Follow this link for LinoSPAD2. (The original LinoSPAD is also supported by the new software/firmware.)
Changelog: - Support independent acquisition window synchronization control in TDC acquisition tab.
Software (8.3MB .zip, version 20171018)
Changelog:
Software (8.2MB .zip, version 20170427)
Software (8.2MB .zip, version 20170105)
Software (8.5MB .zip, version 20160401)
To program the SPI flash PROM with Xilinx Impact 14.7, use the .mcs file and select the S25FL128S, data width 4.
Changes from previous version:
FPGA image (.bit) (1.2MB .zip, version 20150724)
SPI flash image (.mcs) (2.4MB .zip, version 20150724)
Changelog:
FPGA image (.bit) (1.2MB .zip, version 20150723)
SPI flash image (.mcs) (2.4MB .zip, version 20150723)
FPGA image (.bit) (1.2MB .zip, version 20150722)
SPI flash image (.mcs) (2.4MB .zip, version 20150722)
December 2016: Flipped pixels
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S. Burri, C. Bruschini, and E. Charbon:
“LinoSPAD: A Compact Linear SPAD Camera System with 64 FPGA-Based TDC Modules for Versatile 50 ps Resolution Time-Resolved Imaging,”
Instruments 2017, 1(1), 6; doi:10.3390/instruments1010006.
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S. Burri, H. Homulle, C. Bruschini, and E. Charbon:
“LinoSPAD: a time-resolved 256 x 1 CMOS SPAD line sensor system featuring 64 FPGA-based TDC channels running at up to 8.5 giga-events per second,”
Proc. SPIE, Optical Sensing and Detection IV, vol. 9899, 2016.